The present invention relates to CMOS imagers, and more particularly relates to techniques for increasing the dynamic range of a CMOS imager.
Conventionally, CMOS imagers are characterized by a linear voltage-to-light response, or transfer function; that is, the imager output voltage is approximately linearly related to light incident on the imager. Specifically, the output voltage transfer function is linearly proportional to the intensity of the light incident on the imager. This linear transfer function can be characterized by a dynamic range, given as the ratio of the highest detectable illumination intensity of the imager to the lowest detectable illumination intensity of the imager. It is well understood that the dynamic range of the transfer function sets the overall dynamic range of the imager. If the dynamic range of a scene exceeds the dynamic range of an imager, portions of the scene will saturate the imager and appear either completely black or completely white. This can be problematic for imaging large dynamic range scenes, such as outdoor scenes.
Conventionally, a CMOS imager pixel includes a phototransistor or photodiode as a light detecting element. In operation, e.g., the pixel photodiode is first reset with a reset voltage that places an electronic charge across the capacitance associated with the diode. Electronic charge produced by the photodiode when exposed to illumination then causes charge of the diode capacitance to dissipate in proportion to the incident illumination intensity. At the end of an exposure period, the change in diode capacitance charge is detected and the photodiode is reset. The amount of light detected by the photodiode is computed as the difference between the reset voltage and the voltage corresponding to the final capacitance charge. The illumination intensity that causes the photodiode capacitance charge to be completely dissipated prior to the end of the exposure period, thereby saturating the pixel, sets the upper end of the pixel dynamic range, while thermally generated photodiode charge and other noise factors set the lower end of the pixel dynamic range.
Referring to FIG. 1, the operation of a prior art pixel 10 is described, FIG. 1 providing a schematic diagram of the pixel. This example pixel configuration employs a photodiode. In the current example, a photodiode 11 of the pixel produces a current of photogenerated electrical charge in response to light incident on the pixel. The resulting photocurrent is directed to a charge-sensing capacitor 13. The charge-sensing capacitor 13 is in practice provided as a collection of parasitic capacitances that are associated with a charge sense node 27 of the photodiode.
A MOS transistor 15 operates as a source follower that buffers the voltage on the capacitor 13 nondestructively to a column line 23 for read out of the voltage. Specifically, a row select MOS switch 17 activates the source follower transistor 15 when the particular row is selected to thereby enable the capacitor voltage measurement. When the row select MOS switch 17 of the row is turned ON, and a current source 25 is connected to the source of the MOS transistor 15, the MOS transistor 15 and the current source 25 operate as a source-follower configuration to buffer the voltage on the photodiode capacitor 13 to the column line 23 for determining the capacitor voltage at the end of an exposure period.
FIG. 3 shows a typical reset voltage waveform VR(t) applied to the gate 21 of the reset transistor 19 and the voltage waveform VP(t) at the sense node 27. For simplicity of discussion, the steady-state gate-to-source voltage of the reset transistor 19 is assumed to be zero when turned ON although in practice this voltage is non-zero. The reset voltage VR(t) is raised to a voltage VRESET for a duration of time referred to as reset period, indicated as TR in FIG. 3. During this reset period, the reset transistor 19 resets the voltage VP(t) at the sense node 27 to VRESET.
As explained previously, the actual voltage that the sense node is reset to is a few hundred millivolts below VRESET due to the non-zero gate-to-source voltage of reset transistor 19. When the reset voltage is lowered at the end of the reset period, the reset transistor 19 turns OFF. The photo-generated current IP, proportional to the incident light intensity, is now integrated on the sense capacitor, lowering the sense node voltage linearly with time assuming the light intensity is constant. The period of time between the end of the reset period T1 and the time T2 when the sense node voltage is measured, typically just before the beginning of the next reset period, is referred to as integration period TIN. The extent of the sense node voltage change VOUT during the integration period change is a measure of the incident light intensity, and therefore measured as an output voltage of the pixel. It can be shown
      V    OUT    =                    I        P            ⁢              T        IN                    C      S      
where CS is the value of the sense capacitor 13. Since the photocurrent IP is proportional to the incident light intensity, the output voltage VOUT is proportional to the incident light intensity.
The maximum output voltage is limited because the sense node voltage cannot drop below ground by more than a few hundred millivolts because the photodiode is forward biased. Typically, the maximum output voltage that can be measured is limited by the subsequent signal processing circuits such as the correlated double sampling (CDS) circuit and the A/D converter. This maximum measurable output voltage is indicated as VMAX in FIG. 3.
The illumination intensity that causes the output voltage to reach VMAX at the end of the integration period, thereby saturating the measured pixel output voltage , sets the upper end of the pixel dynamic range, while thermally generated photodiode charge and other noise factors set the lower end of the pixel dynamic range.
A variety of techniques have been proposed for expanding the dynamic range of a CMOS imager.
One technique uses double exposures, where two successive frames of the image are taken, one with a long exposure followed by at another with shorter exposure time as illustrated in FIG. 4 where typical reset voltage waveform VR(t) applied to the gate 21 of the reset transistor 19 and the voltage waveform VP(t) at the sense node 27 are shown. As before, for simplicity of discussion, the steady-state gate-to-source voltage of the reset transistor 19 is assumed to be zero when turned ON although in practice this voltage is non-zero. The pixel is reset during the first reset period TR1 and integrated for the first integration period TIN1, producing a first output voltage VOUT1. This output voltage is sampled and stored in a sample-and hold circuit or converted into a digital value and stored in digital registers.
The pixel is reset again during the second reset period TR2 and integrated for the second integration period TIN2, producing a second output voltage VOUT2. This second output voltage is sampled and stored in a sample-and hold circuit or converted into a digital value and stored in digital registers. The outputs VOUT1 and VOUT2 are added with appropriate scaling factor.
Since VOUT1 is obtained with a long integration time TIN1, details in the dark areas are captured. However, the bright areas will saturate as shown in the dotted line, VP2(t), and details in these areas are lost. Since VOUT2 is obtained with a short integration time TIN2, the bright areas do not saturate, but the dark areas do not produce enough response so that the details are not visible.
When the results of the two outputs are added, details in both the dark and bright areas are visible, effectively increasing the dynamic range of the captured image. This technique can be extended to multiple exposures. The disadvantage of the double or multiple exposure method is the complexity resulting from the circuits required to perform additions of pixel outputs from multiple exposure times. Analog addition and digital addition techniques are described in prior art.
As a simple example, assuming the outputs are added in the analog domain with the following formula,VOUT=0.9(VOUT1VOUT2)
and also assumingTIN1=9TIN2,
the illumination intensity versus the output voltage relation in FIG. 5 is obtained. The dotted line extension of the first segment indicates the output of a conventional pixel with a single integration time.TIN=TIN1+TIN2
It is clear from FIG. 5 that the double integration method produces a piecewise linear characteristic which compresses the pixel output voltage in the bright illumination, and extends the dynamic range. In the conventional method, the output saturates at the illumination intensity of I1, while in the double integration method, the output saturates at the illumination intensity of 9.9 I1, roughly a factor of 10 improvement in dynamic range.
However, both analog and digital addition techniques significantly increase the complexity of the imager. There are variations of the double and multiple integration method that uses a single reset. This method involves sampling the output of a pixel at multiple times after a single reset. Similar increase of the dynamic range is obtained, with similar disadvantages to the double and multiple integration techniques described above.
In another technique to increase the dynamic range, the voltage-to-light transfer function of the imager is modified to be a nonlinear function of illumination intensity, with transfer function slope increasing linearly as a function of illumination intensity. This transfer function modification is typically implemented as a photodiode capacitance charge control function within a CMOS imager pixel.
Specifically, in this technique, over the course of an exposure period a control voltage is applied to the photodiode to control charge capacity of the sense capacitance. The charge control voltage is typically decreased from the starting pixel reset voltage value to, e.g., electrical ground, with each control voltage value at a given time during the exposure period setting the maximum charge dissipation of the photodiode. This control voltage decrease acts to increase the photodiode charge dissipation capability, whereby the pixel can accommodate a higher illumination intensity before saturating, and the dynamic range of the pixel is thusly increased. This charge dissipation control overrides the conventional linear voltage-to-charge transfer function of the pixel to produce a nonlinear transfer function, generally referred to as a compressed transfer function, and a correspondingly expanded dynamic range of the pixel and the imager.
Theoretically, the charge dissipation control voltage applied to a pixel photodiode is preferably continuously adjusted over the course of an exposure period. This enables the production of almost any desired transfer function compression characteristic. For many applications, this theoretical condition is not practical, however.
Conventional CMOS imagers include an array of pixel columns and rows and typically do not include pixel memory. Therefore, at the end of an exposure period each row of pixel values must be immediately read out. But in general, only one row of pixel values can be read out at a time.
To accommodate this condition, the exposure periods of the pixel rows are typically staggered in a time sequence corresponding to the sequential pixel row read out. As a result, the desired pixel charge control voltage waveform must also be applied to the pixel rows in a staggered sequence; the same control voltage waveform is applied to every pixel row but is staggered in time between rows.
As a practical matter, given, e.g., a conventional VGA imager including 480 pixel rows, it would be difficult to deliver 480 continuous-time control voltage waveforms to the imager array or to generate 480 delayed versions of a single continuous-time waveform. It has been found that the approximation of a continuous-time control voltage waveform by a discrete-time, or stepped, control voltage waveform addresses this timing concern while enabling more flexibility and ease in control voltage generation and sequential delivery to a pixel array. In this technique, a desired continuous-time control voltage waveform, or transfer function compression curve, is approximated by voltage steps. This results in a finite number, e.g., eight, of distinct control voltage levels to be applied in a discrete manner to a pixel over the course of that pixel's exposure period as shown in FIG. 2.
One of the disadvantages of this technique is that the control voltage levels are applied continuously during the exposure period. Conventionally, the prescribed discrete-time analog control voltages are generated off-chip from the imager array and the barrier voltages must not have any positive glitches then delivered to each pixel row on-chip in a staggered sequence controlled by, e.g., a digital controller. It has been found that this scenario enables good pixel control as well as timing control and additionally provides the ability to modify the transfer function compression characteristic. It has been recognized that the discrete analog voltages produced to impose imager transfer function control preferably are regulated to be precise and noise free, and preferably are maintained free of glitches, where a “glitch” is here defined as a rapid excursion, or spike, in the voltage. Without such regulation, the desired compression function could be distorted, with the resulting images including noise or appearing unnatural. Regulation of the control voltages is particularly important as the voltages are switched from one pixel row to the next. Specifically, when a given control voltage is applied from one pixel row to the next, a voltage excursion, or glitch, is produced due to an inherent row switching capacitance. Such an excursion in a voltage source could cause rows of pixels already connected to that voltage to dissipate charge or accumulate charge in a manner not consistent with the desired transfer function. Since the control voltages determine the charge capacity of pixels at any time, the control voltages must be maintained glitch-free; i.e., the control voltages must be generated in such way the glitches do not affect the charge capacity.
Another disadvantage of this technique is the fact that the effective charge capacity is not constant even when the control voltage is kept constant. During the integration phase, the maximum current through the reset transistor on whose gate the control voltage is applied is the photo current. Since the photocurrent is typically on the order of 1 pA or less, the gate-to-source voltage can change only slowly with time. If a pixel is very bright, the pixel voltage hits the barrier voltage sooner, causing the pixel voltage to go down lower compared with the less bright pixel whose pixel voltage hits the barrier at a later time. In other words, the compression characteristic is not static function, and hence becomes a complex function of the control voltage waveforn, pixel capacitance, and photo current, among other tings. Therefore, the compression characteristic becomes difficult to control precisely. The first barrier level in relation to the reset level, which determines the first inflection point of the compression curve, can be most severely affected because the duration of the reset period is typically different from the duration of any barrier level.